The Importance of Signal Integrity: Achieving Robust Gen-3 >10 Gbaud Signaling in OpenVPX™ Systems

The original VPX specification was never intended to support USB 3.1, PCI Express Gen 3, 40 Gigabit Ethernet or Infiniband.  If your application requires these interfaces, you will need to understand the high-speed signaling issues involved. 
The OpenVPX™ (VITA 65) ecosystem is now transitioning from Gen-2 to Gen-3 signaling, which brings with it an increase in signaling rates from 6.25 Gbaud to >10 Gbaud. The near doubling of bandwidth resulting from this change involves significant design challenges.  The transition to Gen-3 will require an increase in the level of signal integrity tools, capability, expertise, and know-how to ensure successful design and implementation of your OpenVPX system.  This white paper reviews the challenges posed by Gen-3 signaling and offers insight into ways that VPX designs can move forward with confidence.  If your VPX application requires USB 3.1, PCIe Gen-3, 40 GbE, Infiniband or another high-speed interface, this white paper is for you.

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